FINAL TERM EXAMINATION
Spring 2010
CS302- Digital Logic Design (Session - 4)
Time: 90 min
Marks: 58
Question No: 23 ( Marks: 1 ) - Please choose one
The voltage gain of the Inverting Amplifier is given by the relation ________
► Vout / Vin = - Rf / Ri
► Vout / Rf = - Vin / Ri
► Rf / Vin = - Ri / Vout
► Rf / Vin = Ri / Vout
Question No: 24 ( Marks: 1 ) - Please choose one
______ of a D/A converter is determined by comparing the actual output of a D/A converter with the expected output.
► Resolution
► Accuracy
► Quantization
► Missing Code
Question No: 25 ( Marks: 1 ) - Please choose one
Above is the circuit diagram of _______.
► Asynchronous up-counter
► Asynchronous down-counter
► Synchronous up-counter
► Synchronous down-counter
Question No: 26 ( Marks: 1 ) - Please choose one
The sequence of states that are implemented by a n-bit Johnson counter is
► n+2 (n plus 2)
► 2n (n multiplied by 2)
► 2n (2 raise to power n)
► n2 (n raise to power 2)
Question No: 27 ( Marks: 2 )
Draw the Truth-Table of NOR based S-R Latch
| input | output | |
| S | R | QT +1 |
| 0 | 0 | QT |
| 0 | 1 | 0 |
| 1 | 0 | 1 |
| 1 | 1 | INVALID |
Question No: 28 ( Marks: 2 )
Two state assignments are given in the table below. Identify which state assignment is best and why?
| States | State assignment 1 | State assignment 2 |
| A | 00 | 00 |
| B | 01 | 01 |
| C | 11 | 10 |
| D | 10 | 11 |
Ans:
State assignment 2 is best assignment… it Minimizes the number of state variables that don’t change in a group of related states
.
Question No: 29 ( Marks: 2 )
Write down at least two functions of a register.
Ans:
1. Registers are operating as a coherent unit to hold and generate data.
2. registers functions also include configuration and start-up of certain features, especially during initialization, bufferstorage e.g. video memory for graphics cards, input/output (I/O) of different kinds,
Question No: 30 ( Marks: 2 )
Define quantization process.
Ans:
The process by which we can convert an analogue signal into digital signal (code) is known as quantization process.
Question No: 31 ( Marks: 3 )
How can we calculate the frequency of an unknown signal?
Ans:
The frequency of a particular event is accomplished by counting the number of times that event occurs within a specific time interval, then dividing the count by the length of the time interval.
Question No: 32 ( Marks: 3 )
Given the following statement used in PLD programming:
Y PIN 23 ISTYPE ‘com’;
Explain what does this statement mean?
Ans:
The Y variable is a ‘Combinational’ output available directly from the AND-OR gate array output. The active-low or active-high output of the Registered Mode can also be specified in the declaration statement
Question No: 33 ( Marks: 3 )
Explain dynamic RAM in your own words.
Ans:
Dram use latch to store a single bit of information.the main drawback of it id the discharge of capacitor over a period of time.here four gates are used in making a singlelatch. In terms of transistors, 4 to 6 transistors are required to implement a single storage cell. In order to build memories with higher densities, a single transistor is used to store a binary value. A single transistor can not store a binary value however it is used to charge and discharge a capacitor.The capacitor can not retain the charge, therefore it has to be periodically charged
through a refresh cycle.
Question No: 34 ( Marks: 5 )
You are given the Next-state table of a moor machine, using this information draw the state diagram of the machine.
| Present State | Next State | ||||
| Q2 | Q1 | Q0 | Q2 | Q1 | Q0 |
| 0 | 1 | 1 | 1 | 1 | 1 |
| 1 | 1 | 1 | 0 | 0 | 1 |
| 0 | 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 | 0 |
| 1 | 0 | 0 | 1 | 1 | 0 |
| 1 | 1 | 0 | 0 | 1 | 1 |
Question No: 35 ( Marks: 5 )
Explain Memory Select or Enable Signals
Memory Select or Enable Signal:
There are more than one memory chips to store program
Information in daily use computers. read or write operation is carried out on a single addressable location instantaneously .
The unique location is accessed in one of the several memory chips, so single memory chips is selected before a read or write operation can be carried out. All memory chips have a chip enable or chip select signal which has to be activated before the memory can be accessed.
Question No: 36 ( Marks: 5 )
Performance characteristics of D/A converters are determined by five parameters. Name them.
Ans:
Performances characteristics of D/A converters are determined by five parameters are as follow:
1. Accuracy
2. Setting time
3. Monotonicity
4. Linearity
5. Resolution
